Network on Chip (NoC) denotes the system responsible for transmitting messages between modules (such as processor cores, memories and other specialized blocks) on an integrated circuit. The energy consumptions of such transmissions is a significant fraction of the total chip power and heavily depends on transmission bit-rate. In many cases, this parameter can be lowered, by decreasing voltage/frequency of the communication channels, without the deteriorating of the application performance. Linear scaling down of the bit-rate of the channel can lead to quadratic savings in its power consumption. We discuss the strategy based on static analysis of the application code, proposed by Guangyu Chen, Feihui Li, Mahmut Kandemir, and Mary Jane Irwin.